1. Field of the Invention
This technology relates to copying data stored in a memory array with a redundant memory area.
2. Description of Related Art
A memory page copy operation, such as the copy back programming command, copies memory from a source page to a destination page, without transferring the copied data to and from a buffer memory external to the integrated circuit. Instead, the copy operation transfers the copied data from the source page to an internal page buffer, and then from the internal page buffer to the destination page.
In prior art, for the redundancy memory scheme (shown in FIG. 1), the defective column is repaired by a redundant column. The copy back program scheme for the prior memory scheme is quite simple, and is shown in FIG. 2. In the copy back program flow, in step 1 the copy back read command is issued. In step 2, the data for the source page is downloaded from the array to the internal page buffer. Step 3 the copy back program command is issued, which includes input of the destination page address. Step 4 is optional; the internal page buffer data also can be modified or added from the external source if needed. In step 5, the copy back program start command is issued. For the final step, the internal page buffer data is directly programmed to the destination page.
In this prior art, the memory operations that address defective memory locations are redirected by column redundancy circuitry to the redundant memory locations assigned to the defective memory locations of the main array. Accordingly, such memory operations that address defective memory locations are performed instead on the redundant memory locations.
However, in a defective column, the defect may happen in the whole column or part of the column. In the general case, the majority of defects happen in only part of the column, and it is more economical to divide one redundant column into several repair segments, as shown in FIG. 3, which has two redundancy segments Segment 1 and Segment 2. In another example in FIG. 8, the redundancy segments Segment 1, Segment 2, Segment 3, Segment 4 divide both the main array and the redundant array. The first redundant column segment can be used to repair the first defective column segment, that is, from block 0 to block 255. The second redundant column segment can be used to repair the second defective column segment (block 256 to block 511), and so on. The presently described technology is used in this latter case of one redundant column divided into several repair segments.
For the multi-segment redundant system, the copy back program scheme of the prior art cannot be used. A memory page copy operation such as copy back programming bypasses the column redundancy circuitry, and as a result, bypasses the associated redirection of defective memory addresses to redundant memory addresses. If a particular column of the memory array is defective at the source page, then copying data from that defective column of the source page is ineffective. Similarly, if a particular column of the memory array is defective at the destination page, then copying data to that defective column of the destination page is ineffective.
Because the memory page copy operation fails to include the redirection of defective addresses in the main array to replacement addresses in the redundant array, the memory page copy operation from the source page to the destination page results in various failures.
In one case, the source page may have a defect in a particular main address of the main array part of the source page, for example at a particular column of the main array part of the source page. However, the destination page may not have a defect in the same particular main address of the main array part of the destination page, for example the same particular column of the main array part of the destination page.
In another case, the destination page may have a defect in a particular main address of the main array part of the destination page, for example at a particular column of the main array part of the destination page; whereas the source page may not have a defect in the same particular main address of the main array part of the source page, for example the same particular column of the main array part of the source page.
In yet another case, the source page and the destination page may have a defect in a same particular main address of the main array parts of the source page and the destination page, for example at a same particular column of the main array parts of the source page and the destination page. However, the defects may be fixed by different parts of the respective redundant array at different redundant addresses. For example the defect in the main array part of the source page may be fixed by a first particular column of the redundant array part of the source page, whereas the defect in the main array part of the destination page may be fixed by a second particular column of the redundant array part of the destination page.
In another prior art for the multi-segments redundant system, the page buffer is required to be non-defective memory. In this memory, the external data in and out is moved through the page buffer of the main array. In the read procedure, the page buffer data is moved from the redundant column to the defective column at the end of the read procedure. In the program procedure (including the copy back program), the page buffer data is moved from the defective column to the redundant column at the beginning of the program procedure. The scheme is quite simple. However, some penalty is paid for the non-defective page buffer. For example, a larger page buffer area can be used to relax the critical design rule.
To address various problems with the prior art, for the multi-segments redundant system, a new copy back program scheme is proposed in the following description.